A light emitting device often utilizes a double heterostructure in which an active region of III-V semiconductor is sandwiched between two oppositely doped III-IV compounds. By choosing appropriate materials for the outer layers, the band gaps are made to be larger than that of the active layer. This procedure, well known to one of ordinary skill in the art, produces a device that permits light emission due to recombination in the active region, but prevents flow of electrons or holes between the active layer and the higher band gap sandwiching layers due to the differences between the conduction band energies and the valence band energies, respectively. Light emitting devices can be fabricated to emit from the edge of the active layer, or from the surface. Typically, the first layer of material, the substrate, is n-type Indium Phosphide (InP) with an n-type buffer layer, which, again, is Indium Phosphide normally. The active layer is often a quaternary material and is p-type. This active layer is, for example, Indium Gallium Arsenide Phosphide (InGaAsP) with a p-type cladding layer for example, again, Indium Phosphide disposed thereon. Such a structure is made to have light emission which is orthogonal to the plane of the layer of the active region, rather than from a direction which is parallel to the plane of the active layer, which is an edge emitting device.
One area of optoelectronics which has seen a great deal of activity in the recent past is passive alignment. Silicon waferboard, which utilizes the crystalline properties of silicon for alignment of optical fibers, as well as passive and active optical devices has gained a great deal of acceptance in the recent past. One technique for aligning an optoelectronic device to an optical fiber and other passive/active elements is the use of alignment pedestals for x, y planar registration and standoffs for height registration. By virtue of the sub-micron accuracy of photolithography, the etching of alignment fiducials has proven to be a viable alignment alternative. By effecting alignment in a passive manner, the labor input to the finished product can be reduced, resulting in increased performance at a reduction in labor input during the alignment process. One example of such a passive alignment scheme can be found in U.S. Pat. No. 5,163,108 to Armiento, et al., the disclosure of which is specifically incorporated by reference herein. The reference to Armiento, et al., makes use of an alignment notch on the chip of the device with alignment pedestals disposed on the silicon waferboard. This structure is for aligning an optical fiber array to an array of light emitting devices.
While the reference to Armiento, et al., is a viable approach to aligning an edge emitting device, there is a need in the industry to make use of surface emitting devices. An alternative approach to the structure disclosed in the reference to Armiento, et al. which does enable the passive alignment of surface emitting devices is as disclosed in U.S. patent application Ser. No. 08/674,770 to Boudreau, et al., the disclosure of which is specifically incorporated herein by reference. While the reference to Boudreau, et al. makes use of a passive alignment member which is fabricated from silicon and is used to effect the alignment of an optoelectronic device which is either surface emitting or detecting, there is a need for alignment of the surface emitting/detecting device through precision notches directly on the device.
Accordingly, what is needed is an alignment technique for aligning a surface emitting/detecting optoelectronic device by way of alignment fiducials directly on the die of the device.